Tuesday, 29 September 2020

Hitachi 17LD4220, Hitachi 17LD4220U How to enter the service mode, service mode adjustments, schematic diagram

 17” TFT-LCD TV is a Progressive TV control system based on the µ-controller SDA555X, with built-in deinterlacer and scaler. TFT TV is a progressive scan flicker free colour television with PC input, driving an WXGA(1280*768) panel with 16:9 aspect ratio. The chassis is capable of operation in PAL, SECAM, NTSC (playback) colour standards and multiple transmission standards as B/G, D/K, I/I’, and L/L´. Sound system output is supplying 2x3W (10%THD) speakers. The chassis is equipped with two full SCART’s, one back-AV, one  SVHS, one D-Sub 15 (PC) input, one PC stereo audio input and one line out (left and right) and one HP Outputs

As the thickness of the TV set has a limit, a horizontal mounted tuner is used in the product, which is suitable for CCIR systems B/G, H, L, L´, I/I´, and D/K. The tuning is available through the digitally controlled I2C bus (PLL). Below you will find info on the Tuner in use.

General description of UV1316:

The UV1316 tuner belongs to the UV 1300 family of tuners, which are designed to meet a wide range of applications. It is a combined VHF, UHF tuner suitable for CCIR systems B/G, H, L, L’, I and I’. The low IF output impedance has been designed for direct drive of a wide variety of SAW filters with sufficient suppression of triple transient.

IF PART (TDA988X)

The TDA9885 is an alignment-free single standard (without positive modulation) vision and sound IF signal PLL.

The TDA9886 is an alignment-free multi standard (PAL, SECAM and NTSC) vision and sound IF signal PLL demodulator for positive and negative modulation including sound AM and FM processing.

Both devices can be used for TV, VTR, PC and set-top box applications.

MULTI STANDARD SOUND PROCESSOR

The MSP34x0G family of single-chip Multistandard Sound Processors covers the sound processing of all analog TV-Standards worldwide, as well as the NICAM digital sound standards. The full TV sound processing, starting with analog sound IF signal-in, down to processed analogue AF-out, is performed on a single chip.

These TV sound processing ICs include versions for processing the multichannel television sound (MTS) signal conforming to the standard recommended by the Broadcast Television Systems Committee (BTSC).

The DBX noise reduction, or alternatively, Micronas Noise Reduction (MNR) is performed alignment free.

Other processed standards are the Japanese FM-FM multiplex standard (EIA-J) and the FM Stereo Radio standard.

Current ICs have to perform adjustment procedures in order to achieve good stereo separation for BTSC and EIA-J. The MSP 34x1G has optimum stereo performance without any adjustments.

AUDIO AMPLIFIER STAGE WITH TPA3003D2

The TPA3003D2 is a 3-W (per channel) efficient, Class-D audio amplifier for driving bridged-tied stereo speakers. The TPA3003D2 can drive stereo speakers as low as 8 Ω. The high efficiency of the TPA3003D2 eliminates the need for external heatsinks when playing music. Stereo speaker volume is controlled with a dc voltage applied to the volume control terminal offering a range of gain from –40 dB to 36 dB.

POWER

The LM2576 series of regulators are monolithic integrated circuits ideally suited for easy and convenient design of a step–down switching regulator (buck converter). All circuits of this series are capable of driving a 3.0A load with excellent line and load regulation. Two different versions (one having a fixed output voltage of 3.3 V, and one with 5.0 V) of this IC are used in the regulator board.

SERIAL ACCESS CMOS 16K (2048*8) EEPROM ST24C16

The ST24C16 is a 16Kbit electrically erasable programmable memory (EEPROM), organised as 8 blocks of 256*8 bits. The memory is compatible with the I²C standard, two wire serial interface, which uses a bidirectional data bus and serial clock. The memory carries a built-in 4 bit, unique device identification code (1010) corresponding to the I²C bus definition. This is used together with 1 chip enable input (E) so that up to 2*8K devices may be attached to the I²C bus and selected individually.

LM2576

The LM2576 series of regulators are monolithic integrated circuits ideally suited for easy and convenient design of a step–down switching regulator (buck converter). All circuits of this series are capable of driving a 3.0 A load with excellent line and load regulation.

These devices are available in fixed output voltages of 3.3 V, 5.0 V, 12 V, 15 V, and an adjustable output version. These regulators were designed to minimize the number of external components to simplify the power supply design. Standard series of inductors optimized for use with the LM2576 are offered by several different inductor manufacturers.

Since the LM2576 converter is a switch–mode power supply, its efficiency is significantly higher in comparison with popular three–terminal linear regulators, especially with higher input voltages. In many cases, the power dissipated is so low that no heatsink is required or its size could be reduced dramatically.

A standard series of inductors optimized for use with the LM2576 are available from several different manufacturers. This feature greatly simplifies the design of switch–mode power supplies.

The LM2576 features include a guaranteed ±4% tolerance on output voltage within specified input voltages and output load conditions, and ±10% on the oscillator frequency (±2% over 0°C to 125°C). External shutdown is included, featuring 80 mA (typical) standby current. The output switch includes cycle–by–cycle current limiting, as well as thermal shutdown for full protection under fault conditions.

LM317T

The LM317T is an adjustable 3 terminal positive voltage regulator capable of supplying in excess of 1.5 amps over an output range of 1.25 to 37 volts. This voltage regulator is exceptionally easy to use and requires only two external resistors to set the output voltage. Further, it employs internal current limiting, thermal shutdown and safe area compensation, making it essentially blow–out proof. The LM317 serves a wide variety of applications including local, on card regulation. This device can also be used to make a programmable output regulator, or by connecting a fixed resistor between the adjustment and output, the LM317 can be used as a precision current regulator.

ST24LC21

The ST24LC21 is a 1K bit electrically erasable programmable memory (EEPROM), organized by 8 bits. This device can operate in two modes: Transmit Only mode and I2C bidirectional mode. When powered, the device is in Transmit Only mode with EEPROM data clocked out from the rising edge of the signal applied on VCLK. The device will switch to the I2C bidirectional mode upon the falling edge of the signal applied on SCL pin. The ST24LC21 can not switch from the I2C bidirectional mode to the Transmit Only mode (except when the power supply is removed). The device operates with a power supply value as low as 2.5V. Both Plastic Dual-in-Line and Plastic Small Outline packages are available.

TEA6415

The main function of the IC is to switch 8 video input sources on 6 outputs. Each output can be switched on only one of each input. On each input an alignment of the lowest level of the signal is made (bottom of synch. top for CVBS or black level for RGB signals). Each nominal gain between any input and output is 6.5dB. For D2MAC or Chroma signal the alignment is switched off by forcing, with an external resistor bridge, 5 VDC on the input. Each input can be used as a normal input or as a MAC or Chroma input (with external resistor bridge). All the switching possibilities are changed through the BUS. Driving 75Ω load needs an external transistor. It is possible to have the same input connected to several outputs. The starting configuration upon power on (power supply: 0 to 10V) is undetermined. In this case, 6 words of 16 bits are necessary to determine one configuration. In other case, 1 word of 16 bits is necessary to determine one configuration.

VPC3230D

The VPC 323xD is a high-quality, single-chip video front-end, which is targeted for 4:3 and 16:9, 50/60-Hz and 100/120 Hz TV sets. It can be combined with other members of the DIGIT3000 IC family (such as DDP 331x) and/or it can be used with 3rd-party products.

SDA55XX (SDAThe SDA55XX is a single chip teletext decoder for decoding World System Teletext data as well as Video Programming System (VPS), Program Delivery Control (PDC), and Wide Screen Signalling (WSS) data used for PAL plus transmissions (Line 23). The device also supports Closed caption acquisition and decoding. The device provides an integrated general-purpose, fully 8051-compatible Microcontroller with television specific hardware features. Microcontroller has been enhanced to provide powerful features such as memory banking, data pointers, and additional interrupts etc. The on-chip display unit for displaying Level 1.5 teletext data can also be used for customer defined on screen displays. Internal XRAM consists of up to16 Kbytes. Device has an internal ROM of up to 128 KBytes. ROMless versions can access up to 1 MByte of external RAM and ROM. The SDA 55XX supports a wide range of standards including PAL, NTSC and contains a digital slicer for VPS, WSS, PDC, TTX and Closed Caption, an accelerating acquisition hardware module, a display generator for Level 1.5 TTX data and powerful On screen Display capabilities based on parallel attributes, and Pixel oriented characters (DRCS).  The 8-bit Microcontroller runs at 360 ns. cycle time (min.). Controller with dedicated hardware does most of the internal TTX acquisition processing, transfers data to/from external memory interface and receives/transmits data via I2C-firmware user-interface. The slicer combined with dedicated hardware stores TTX data in a VBI buffer of 1 Kilobyte. The Microcontroller firmware performs all the acquisition tasks (hamming and parity-checks, page search and evaluation of header control bits) once per field. Additionally, the firmware can provide high-end Teletext features like Packet-26-handling, FLOF, TOP and list-pages. The interface to user software is optimized for minimal overhead. SDA 55XX is realized in 0.25 micron technology with 2.5 V supply voltage and 3.3 V I/O (TTL compatible). The software and hardware development environment (TEAM) is available to simplify and speed up the development of the software and On Screen Display. TEAM stands for TVT Expert Application Maker. It improves the TV controller software quality in following aspects:

– Shorter time to market

– Re-usability

– Target independent development

– Verification and validation before targeting

– General test concept

– Graphical interface design requiring minimum programming and controller know how.

– Modular and open tool chain, configurable by customer.

TPA3003D2

The TPA3003D2 is a 3-W (per channel) efficient, Class-D audio amplifier for driving bridged-tied stereo speakers. The TPA3003D2 can drive stereo speakers as low as 8 Ω. The high efficiency of the TPA3003D2 eliminates the need for external heatsinks when playing music. Stereo speaker volume is controlled with a dc voltage applied to the volume control terminal offering a range of gain from –40 dB to 36 dB.

TDA9885/86

The TDA9885 is an alignment-free single standard (without positive modulation) vision and sound IF signal PLL.

The TDA9886 is an alignment-free multistandard (PAL, SECAM and NTSC) vision and sound IF signal PLL demodulator for positive and negative modulation including sound AM and FM processing.  Both devices can be used for TV, VTR, PC and set-top box applications.

TDA1308

The TDA1308 is an integrated class AB stereo headphone driver contained in an SO8 or a DIP8 plastic package. The device is fabricated in a 1 mm CMOS process and has been primarily developed for portable digital audio applications

PI5V330

Pericom Semiconductor’s PI5V series of mixed signal video circuits are produced in the Company’s advanced CMOS low-power technology, achieving industry leading performance.

The PI5V330 is a true bidirectional Quad 2-channel multiplexer/demultiplexer that is recommended for both RGB and composite video switching applications. The VideoSwitch™ can be driven from a current output RAMDAC or voltage output composite video source.

Low ON-resistance and wide bandwidth make it ideal for video and other applications. Also this device has exceptionally high current capability which is far greater than most analog switches offered today. A single 5V supply is all that is required for operation.

The PI5V330 offers a high-performance, low-cost solution to switch between video sources. The application section describes the PI5V330 replacing the HC4053 multiplier and buffer/amplifier.

GM6015

The Genesis Microchip 6015RD1 LCD TV reference board is a complete display processor for LCD, PDP and LCOS based televisions. The reference board demonstrates the processing capabilities of the Genesis Microchip gm6015 television controller IC. The gm6015 IC is a full-featured, dual-channel video processor with Genesis industry leading Crystal Ciema PlusTM video scan conversion. The 6015RD1 board inputs analog YPbPr/RGB, NTSC/PAL/SECAM CVBS/YC, UHF/VHF and outputs digital RGB to an XGA LCD panel. A convenient on-screen display system provides easy control of the board’s processing capabilities. The design kit is complete with hardware and software. Software includes G-Probe debug software, GWizard register calculator and G-TV application source code.  The 6015RD1 is a related reference board that outputs analog YpbPr/RGB.

AD9883A

The AD9883A is a complete 8-bit, 140 MSPS monolithic analog interface optimized for capturing RGB graphics signals from personal computers and workstations. Its 140 MSPS encode rate capability and full power analog bandwidth of 300 MHz supports resolutions up to SXGA (1280 ­ 1024 at 75 Hz). The AD9883A includes a 140 MHz triple ADC with internal 1.25 V reference, a PLL, and programmable gain, offset, and clamp control. The user provides only a 3.3 V power supply, analog input, and Hsync and COAST signals. Three-state CMOS outputs may be powered from 2.5 V to 3.3 V.  The AD9883A’s on-chip PLL generates a pixel clock from the Hsync input. Pixel clock output frequencies range from 12 MHz to 140 MHz. PLL clock jitter is 500 ps p-p typical at 140 MSPS. When the COAST signal is presented, the PLL maintains its output frequency in the absence of Hsync. A sampling phase adjustment is provided. Data, Hsync, and clock output phase relationships are maintained. The AD9883A also offers full sync processing for composite sync and sync-on-green applications.

A clamp signal is generated internally or may be provided by the user through the CLAMP input pin. This interface is fully programmable via a 2-wire serial interface.  Fabricated in an advanced CMOS process, the AD9883A is provided in a space-saving 80-lead LQFP surface-mount plastic package and is specified over the 0C to 70C temperature range.

• 140 MSPS Maximum Conversion Rate

• 300 MHz Analog Bandwidth

• 0.5 V to 1.0 V Analog Input Range

• 500 ps p-p PLL Clock Jitter at 110 MSPS

• 3.3 V Power Supply

• Full Sync Processing

• Sync Detect for “ Plugging ”

• Midscale Clamping

• Power-Down Mode

• Low Power:500 mW Typical

• 4:2:2 Output Format Mode

MC141585

This is a high performance HCMOS device designed to interface with a micro controller unit to allow colored symbols or characters to be displayed onto a LCD monitor. Because of the large number of fonts, 512 fonts including 496 standard fonts and 16 multi-color fonts,  MOSD2-16 is suitable to be adopted for the multi-language monitor application especially. It minimizes the MCU’s burden through its built-in RAM.  By storing a full screen of data and control information, this device has a capability to carry out ‘screenrefresh’ without any MCU supervision. Programmable hatch pattern generator is added for individual pixel inspection.

Since there is no clearance between characters, special graphics oriented characters can be generated by combining two or more character blocks. The full OSD menu is formed of 15 rows x 30 columns which can by freely positioned on anywhere of the monitor screen by changing vertical or horizontal delay.  Special functions such as character background color, blinking, bordering or shadowing, four-level windows with programmable size, row double height and double width, programmable vertical height of character and row-to-row spacing, and full-screen erasing and Fade-In/Fade-Out are also incorporated.  There are 8 color selections for any individual character display with row intensity attribute and window intensity attribute to expand the color mixture on OSD menu.

• Totally 512 Fonts Including 496 Standard Fonts and 16 Multi-Color Fonts.

• 10x18 or 12x18 Font Matrix Selection

• Maximum Pixel CLK of 80MHz

• Maximum input resolution of 1580 dots/line (PIXin/HSYNC ratio)

• Wide Operating Frequency: max. 150KHz for Monitor

• Fully Programmable Character Array of 15 Rows by 30 Columns

• 8-Color Selection for Characters with Color Intensity Attribute on Each Row

• 7-Color Selection for Characters background

• True 16-Color Selection for Windows

• Shadowing on Windows with Programmable Shadow Width/Height/Color

• Fancy Fade-In/Fade-Out Effects

• Programmable Height of Character to Meet Multi-Sync Requirement

• Row To Row Spacing Control to Avoid Expansion Distortion

• Four Programmable Windows with Overlapping Capability

• Character Bordering or Shadowing

• Character/Symbol Blinking Function

• Programmable Vertical and Horizontal Positioning for Display Center

• M_BUS (IIC) Interface with Address $7A

MC34063

The MC34063A Series is a monolithic control circuit containing the primary functions required for DC–to–DC converters. These devices consist of an internal temperature compensated reference, comparator, controlled duty cycle oscillator with an active current limit circuit, driver and high current output switch. This  series was specifically designed to be incorporated in Step–Down and Step–Up and Voltage–Inverting applications with a minimum number of external components.

MSP34X0G

The MSP 34x0G family of single-chip Multistandard Sound Processors covers the sound processing of all analog TV-Standards worldwide, as well as the NICAM digital sound standards. The full TV sound processing, starting with analog sound IF signal-in, down to processed analog AF-out, is performed on a single chip. Figure shows a simplified functional block diagram of the MSP 34x0G.  This new generation of TV sound processing ICs now includes versions for processing the multichannel television sound (MTS) signal conforming to the standard recommended by the Broadcast Television Systems Committee (BTSC). The DBX noise reduction, or alternatively, MICRONAS Noise Reduction (MNR) is performed alignment free. Other processed standards are the Japanese FM-FM multiplex standard (EIA-J) and the FM Stereo Radio standard. Current ICs have to perform adjustment procedures in order to achieve good stereo separation for BTSC and EIA-J. The MSP 34x0G has optimum stereo performance without any adjustments.

All MSP 34x0G versions are pin and software downward compatible to the MSP 34x0D. The MSP 34x0G further simplifies controlling software. Standard selection requires a single I²C transmission only.

The MSP 34x0G has built-in automatic functions: The IC is able to detect the actual sound standard automatically (Automatic Standard Detection). Furthermore, pilot levels and identification signals can be evaluated internally with subsequent switching between mono/stereo/bilingual; no I²C interaction is necessary (Automatic Sound Selection)

DS90C385

The DS90C385 transmitter converts 28 bits of LVCMOS/LVTTL data into four LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link. Every cycle of the transmit clock 28 bits of input data are sampled and transmitted. At a transmit clock frequency of 85 MHz, 24 bits of RGB data and 3 bits of LCD timing and control data (FPLINE, FPFRAME, DRDY) are transmitted at a rate of 595 Mbps per LVDS data channel.  Using a 85 MHz clock, the data throughput is 297.5 Mbytes/sec. Also available is the DS90C365 that converts 21 bits of LVCMOS/LVTTL data into three LVDS (Low Voltage Differential Signaling) data streams. Both transmitters can be programmed for Rising edge strobe or Falling edge strobe through a dedicated pin. A Rising edge or Falling edge strobe transmitter will interoperate with a Falling edge strobe Receiver (DS90CF386/DS90CF366) without any translation logic.  The DS90C385 is also offered in a 64 ball, 0.8mm fine pitch ball grid array (FBGA) package which provides a 44% reduction in PCB footprint compared to the TSSOP package. This chipset is an ideal means to solve EMI and cable size problems associated with wide, high-speed TTL interfaces.

NDS8947

These P-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance and provide superior switching performance. These devices are particularly suited for low voltage applications such as notebook computer power management and other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed.  All system, geometry and white balance alignments are performed in production service mode.

Before starting the production mode alignments, make sure that all manual adjustments are done correctly. To start production mode alignments enter the main menu by pressing “M” button and then press the digits 4, 7, 2 and 5 buttons respectively. The following menu appears on the screen.

After entering the Service menu, you can access its items by pressing “▲/▼” buttons. In order to enter selected menu, use “◄/►” buttons. To exit the service menu press “M” button.

Entire service menu parameters of TFT TV are listed below.

ADJUST MENU SETTINGS

In order to enter Adjust menu, move the cursor to Adjust… parameter by pressing “▲/▼” buttons in Service Menu and press “◄/►” button. The following menu appears on the screen.

There are no items for adjustment in ADJUST menu for now.

OPTIONS MENU SETTINGS

In order to enter Options menu, move the cursor to Options… parameter by pressing “▲/▼” buttons in Service Menu and press “◄/►” button. The following menu appears on the screen.

There are 50 items in the OPTIONS menu, but 10 of them are seen when you first enter the menu. Using “▲/▼” buttons remaining items can be seen.

Hue On/Off

Enables / disables Hue option in Picture menu.

First APS On/Off

If ON, TV starts with APS menu at Start-up.

A.P.S On/Off

Enables / disables Automatic Programming System.

Headphone On/Off

Enables / disables the usage of the HP and HP related items in Sound menu.

Vsr On/Off

Enables / disables Vsr.

DBE On/Off

Enables / disables DBE.

Subwoofer On/Off

Enables / disables Subwoofer.

Lineout On/Off

Enables / disables Lineout.

Dolby prologic On/Off

Enables / disables dolby prologic system.

Equalizer On/Off

Enables / disables equalizer system.

BG On/Off

Enables / disables BG Standard.

DK On/Off

Enables / disables DK Standard.

I On/Off

Enables / disables I Standard.

L On/Off

Enables / disables L Standard.

L’ On/Off

Enables / disables L’ Standard.

AUS On/Off

Enables / disables AUS Standard.

NZ On/Off

Enables / disables NZ Standard.

NM On/Off

Enables / disables NM Standard.

FM Prs Avl On

Adjusts the FM Prescaler value, when Automatic Volume Levelling is On.

Min. Value: 0000 00000

Max. Value: 00FF 00255


Nicam Prs Avl On

Adjusts the Nicam Prescaler value, when Automatic Volume Levelling is On.

Min. Value: 0000 00000

Max. Value: 00FF 00255

Scart Prs Avl On

Adjusts the Scart Prescaler value, when Automatic Volume Levelling is On.

Min. Value: 0000 00000

Max. Value: 00FF 00255

Scart Volume Avl On

Adjusts the Scart Volume value, when Automatic Volume Levelling is On.

Min. Value: 0000 00000

Max. Value: 00FF 00255

FM Prs Avl Off

Adjusts the FM Prescaler value, when Automatic Volume Levelling is Off.

Min. Value: 0000 00000

Max. Value: 00FF 00255

Nicam Prs Avl Off

Adjusts the Nicam Prescaler value, when Automatic Volume Levelling is Off.

Min. Value: 0000 00000

Max. Value: 00FF 00255

Scart Prs Avl Off

Adjusts the Scart Prescaler value, when Automatic Volume Levelling is Off.

Min. Value: 0000 00000

Max. Value: 00FF 00255

Scart Volume Avl Off

Adjusts the Scart Volume value, when Automatic Volume Levelling is Off.

Min. Value: 0000 00000

Max. Value: 00FF 00255

Hotel VoD On/Off

Enables / disables Hotel Video-on-Demand feature.

X

Not used

Avl On/Off

Enables / disables Automatic Volume Levelling feature.

Top TXT On/Off

Enables / disables TopText feature.

Fast TXT On/Off

Enables / disables FastText feature.

TXT Lang

Switches between Teletext Language Groups.

Min. Value: 0000 00000

Max. Value: 0004 00004

IF Freq

Adjusts the IF Frequency value.

Min. Value: 0000 00000

Max. Value: 00FF 00255

Sound On/Off

Enables / disables Sound.

Carrier On/Off

Enables / disables sound Carrier feature.

RC_Options On/Off

Enables / disables Remote control usage for Service menu.

AV-1 On/Off

Enables / disables AV-1.

AV-2 On/Off

Enables / disables AV-2.

S-VIDEO On/Off

Enables / disables S-VIDEO.

AV-3 On/Off

Enables / disables AV-3.

PC On/Off

Enables / disables PC.

MENU On/Off

Enables / disables semi-transparent MENU.

MIX

Enables / disables teletext MIX mode.

Enable: 00000001

Disable: 00000000

HOTEL MODE

Enables /disables Hotel mode feature.

Enable: 00000001

Disable: 00000000

X

Not used.

LDLY

Adjusts the Luna / chroma DeLaY value.

Min. Value: 0000 00000

Max. Value: 0008 00008

AGC

Adjusts the Automatic Gain Control value.

Min. Value: 0000 00000

Max. Value: 001F 00031

APS WSS TEST MENU

In order to enter Aps Wss Test menu, move the cursor to Aps Wss Test parameter by pressing “▲/▼” buttons in Service Menu and press “◄/►” button. The following menu appears on the screen.

There are 7 items in the Aps Wss Test menu.

Programme

Search

VPS

Pdc Format 1

Pdc Format 2

Name

Wss

Schematic and block diagram










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